A new way to fabricate nanochips

  

The team, headed by New York University Tandon School of Engineering Professor of Chemical and Biomolecular Engineering Elisa Riedo, demonstrated that lithography using a probe heated above 100°C outperformed standard methods for fabricating metal electrodes on 2D semiconductors such as molybdenum disulfide (MoS2).

Such transitional metals are among the materials that scientists believe may supplant silicon for atomically small chips. This new fabrication method - called thermal scanning probe lithography (t-SPL) - is said to offer a number of advantages over today's electron beam lithography (EBL).

First, thermal lithography significantly improves the quality of the 2D transistors, offsetting the Schottky barrier, which hampers the flow of electrons at the intersection of metal and the 2D substrate. Also, unlike EBL, the thermal lithography allows chip designers to easily image the 2D semiconductor and then pattern the electrodes where desired.

Also, t-SPL fabrication systems promise significant initial savings as well as operational costs. They dramatically reduce power consumption by operating in ambient conditions, eliminating the need to produce high-energy electrons and to generate an ultra-high vacuum. Finally, this thermal fabrication method can be easily scaled up for industrial production by using parallel thermal probes.

Prof Riedo expressed hope that t-SPL will take most fabrication out of scarce clean rooms - where researchers must compete for time with the expensive equipment - and into individual laboratories, where they might rapidly advance materials science and chip design.

She points to the precedent of 3D printers as an apt analogy. Someday these t-SPL tools with sub-10 nanometer resolution, running on standard 120-volt power in ambient conditions, could become similarly ubiquitous in research labs like hers.