Cadence moves physical design software to 20 nm

LONDON -- Cadence Design Systems Inc has announced that thelatest release of its Encounter software suite for RTL-to-GDSII design supportsthe 20-nm manufacturing process technology node.

The design, implementation, and signoff flow was developedin collaboration with IP and foundry partners and enables more efficient SoCdevelopment, Cadence said.

Cadence did not say how much Encounter RTL-to-GDSII for20-nm cost per seat nor whose 20-nm processes it supports.

The flow is based on a number of tools with such names asEncounter RTL Compiler, Encounter Test, Encounter ECO Designer, EncounterDigital Implementation System, Clock Concurrent Optimization (CCOpt), EncounterTiming System, Encounter Power System, Cadence QRC Extraction, Cadence PhysicalVerification System, and other design for manufacturing technologies.

The software has already been supplied to some customers."The Cadence Encounter RTL-to-GDSII flow enabled us to achieve the chipperformance and feature objectives of our 1-GHz ARM Cortex-A5 processor-basedsmartphone platform on time and with greater development efficiency," saidLeo Li, president and CEO of Spreadtrum, in a statement issued by Cadence.

This story was originally posted by EETimes.
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